英语词汇“tristate logic (TSL)”的意思、用法、释义、翻译、读音、例句、短语、词组-英汉翻译词典

In the transistor-transistor logic circuits, the circuit added with an inhibiting input. If the inhibiting input is low level, the circuit has two states, i.e. , high level and low level; If inhibiting input is high level, the circuit appears the third state, i.e., the output terminal is the open state.; 在晶体管-晶体管逻辑电路中加上禁止输入的电路。在禁止输入为低电平时，电路有两种状态，即高电平和低电平；当禁止输入为高电平时，电路呈现第三种状态，即输出端为开路状态。

单词	tristate logic (TSL)
释义	tristate logic (TSL) In the transistor-transistor logic circuits, the circuit added with an inhibiting input. If the inhibiting input is low level, the circuit has two states, i.e. , high level and low level; If inhibiting input is high level, the circuit appears the third state, i.e., the output terminal is the open state.; 在晶体管-晶体管逻辑电路中加上禁止输入的电路。在禁止输入为低电平时，电路有两种状态，即高电平和低电平；当禁止输入为高电平时，电路呈现第三种状态，即输出端为开路状态。
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